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External Interrupts in the x86 system. Part 1. Interrupt controller evolution

Системное программирование
Tutorial
This article is about the interrupt delivery process from external devices in the x86 system. It tries to answer questions such as:

  • What is PIC and what is it for?
  • What is APIC and what is it for? What is the purpose of LAPIC and I/O APIC?
  • What are the differences between APIC, xAPIC, and x2APIC?
  • What is MSI? What are the differences between MSI and MSI-X?
  • What is the role of the $PIR, MPtable, and ACPI tables?

If you want to know the answer for one of these questions, or if you simply want to know about interrupt controller evolution, please, welcome.
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Всего голосов 20: ↑19 и ↓1+18
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External Interrupts in the x86 system. Part 2. Linux kernel boot options

Настройка LinuxСистемное программирование
Tutorial

In the last part we discussed evolution of the interrupt delivery process from the devices in the x86 system (PIC → APIC → MSI), general theory, and all the necessary terminology.


In this practical part we will look at how to roll back to the use of obsolete methods of interrupt delivery in Linux, and in particular we will look at Linux kernel boot options:


  • pci=nomsi
  • noapic
  • nolapic

Also we will look at the order in which the OS looks for interrupt routing tables (ACPI/MPtable/$PIR) and what the impact is from the following boot options:


  • pci=noacpi
  • acpi=noirq
  • acpi=off

You've probably used some combination of these options when one of the devices in your system hasn't worked correctly because of an interrupt problem. We'll go through these options and find out what they do and how they change the kernel '/proc/interrupts' interface output.

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Всего голосов 2: ↑2 и ↓0+2
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External Interrupts in the x86 system. Part 3. Interrupt routing setup in a chipset, with the example of coreboot

Open sourceСистемное программированиеC
Tutorial

We continue to investigate external device interrupt routing setup in the x86 system.


In Part 1 (Interrupt controller evolution) we looked at the theory behind interrupt controllers and all the necessary terminology. In Part 2 (Linux kernel boot options) we looked at how in practice the OS chooses between different interrupt controllers. In this part we will investigate how the BIOS sets IRQ to the interrupt controllers routing in a chipset.


None of the modern BIOS developer companies (AwardBIOS/AMIBIOS/Insyde) open their source code. But luсkily there is coreboot — a project aimed at replacing proprietary BIOS with free firmware code. In its source code we'll see what is needed to setup the interrupt routing in a chipset.



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Всего голосов 2: ↑2 и ↓0+2
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